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clk: mediatek: Add MT8195 apusys clock support
authorChun-Jie Chen <chun-jie.chen@mediatek.com>
Tue, 14 Sep 2021 02:16:33 +0000 (10:16 +0800)
committerStephen Boyd <sboyd@kernel.org>
Tue, 14 Sep 2021 22:05:39 +0000 (15:05 -0700)
commit74e1652ce9d3a0155a07cf06360e680c36195742
tree5bf0812608986266c62e80fd69f6287103677ddatree | snapshot
parent222e0fbcef882e5f2707314a410680fb8eb2083ecommit | diff
clk: mediatek: Add MT8195 apusys clock support

Add MT8195 apusys clock controller which provides PLLs
in AI processor Unit.

Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com>
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
Link: https://lore.kernel.org/r/20210914021633.26377-25-chun-jie.chen@mediatek.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
drivers/clk/mediatek/Makefile diff | blob | history
drivers/clk/mediatek/clk-mt8195-apusys_pll.c [new file with mode: 0644] blob
ep93xx device tree rework repo: git://git.maquefel.me/linux.git