phy: qcom-qmp: qserdes-txrx: Add V6 N4 register offsets
authorAbel Vesa <abel.vesa@linaro.org>
Thu, 7 Dec 2023 12:19:15 +0000 (14:19 +0200)
committerVinod Koul <vkoul@kernel.org>
Thu, 21 Dec 2023 17:07:39 +0000 (22:37 +0530)
commit762c3565f3c8105603089eeaa0501e5089922221
tree1de7fb24dc9fd47c134ae5db5cceeb46b738d71c
parentbc546cc85c1d92d9ba7b278b77016b7d4334fafa
phy: qcom-qmp: qserdes-txrx: Add V6 N4 register offsets

There is a variant of V6 offsets that are different, the QMP PHY N4,
and it is found on the X1E80100 platform.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Link: https://lore.kernel.org/r/20231122-phy-qualcomm-v6-v6-20-v7-new-offsets-v3-6-dfd1c375ef61@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
drivers/phy/qualcomm/phy-qcom-qmp-qserdes-txrx-v6_n4.h [new file with mode: 0644]
drivers/phy/qualcomm/phy-qcom-qmp.h