drm/amdgpu/sdma5: add mes queue fence handling
authorJack Xiao <Jack.Xiao@amd.com>
Thu, 26 Mar 2020 02:50:58 +0000 (10:50 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 4 May 2022 14:43:50 +0000 (10:43 -0400)
commit76411afd5bc52470c6ba36cfdaae49248279c33d
tree4b9e289aa0feafeaa516b39e6b67fde58a6b5625
parent217d29f1382e58a08d960cbb02494824efb9753e
drm/amdgpu/sdma5: add mes queue fence handling

From IH ring buffer look up the coresponding kernel queue and process.

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c