projects / qemu.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: 918f5dc) | patch
target-arm: Add AMAIR0, AMAIR1 LPAE cp15 registers
authorPeter Maydell <peter.maydell@linaro.org>
Thu, 12 Jul 2012 10:59:07 +0000 (10:59 +0000)
committerPeter Maydell <peter.maydell@linaro.org>
Thu, 12 Jul 2012 10:59:54 +0000 (10:59 +0000)
commit7ac681cf2aafcef4b17f0f6007e1f4a2520528db
treec15af37f3034a1cda1a2d95f2ced5231da49bb12tree | snapshot
parent918f5dca18d62d014bc84fde726a88bd7e8d3615commit | diff
target-arm: Add AMAIR0, AMAIR1 LPAE cp15 registers

Add implementations of the AMAIR0 and AMAIR1 LPAE
Auxiliary Memory Attribute Indirection Registers.
These are implementation defined and we choose to
implement them as RAZ/WI, matching the Cortex-A7
and Cortex-A15.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
target-arm/helper.c diff | blob | history
Unnamed repository; edit this file 'description' to name the repository.