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drm/amdgpu: fix GCR_GENERAL_CNTL offset for dimgrey_cavefish
authorJiansong Chen <Jiansong.Chen@amd.com>
Mon, 19 Apr 2021 08:33:22 +0000 (16:33 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 21 Apr 2021 01:36:28 +0000 (21:36 -0400)
commit7c49ee9ec54c120a46487b9e4d8172c18f2ea9f6
treefb3205da933f107c89a6ff46d6f5769557162b73tree | snapshot
parentf9727922fc686a4406bb84a91a671c2f0b615ecdcommit | diff
drm/amdgpu: fix GCR_GENERAL_CNTL offset for dimgrey_cavefish

dimgrey_cavefish has similar gc_10_3 ip with sienna_cichlid,
so follow its registers offset setting.

Signed-off-by: Jiansong Chen <Jiansong.Chen@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c diff | blob | history
ep93xx device tree rework repo: git://git.maquefel.me/linux.git