RISC-V: KVM: Fix GPA passed to __kvm_riscv_hfence_gvma_xyz() functions
authorAnup Patel <anup.patel@wdc.com>
Tue, 26 Oct 2021 17:01:36 +0000 (22:31 +0530)
committerPaolo Bonzini <pbonzini@redhat.com>
Sun, 31 Oct 2021 06:45:43 +0000 (02:45 -0400)
commit7c8de080d476e3433d9aec0d6111758c3e4ea917
tree5d6415b234721cd835c9189da9d97398af882d67
parent0a86512dc113e4de6550d49f276142009231c846
RISC-V: KVM: Fix GPA passed to __kvm_riscv_hfence_gvma_xyz() functions

The parameter passed to HFENCE.GVMA instruction in rs1 register
is guest physical address right shifted by 2 (i.e. divided by 4).

Unfortunately, we overlooked the semantics of rs1 registers for
HFENCE.GVMA instruction and never right shifted guest physical
address by 2. This issue did not manifest for hypervisors till
now because:
  1) Currently, only __kvm_riscv_hfence_gvma_all() and SBI
     HFENCE calls are used to invalidate TLB.
  2) All H-extension implementations (such as QEMU, Spike,
     Rocket Core FPGA, etc) that we tried till now were
     conservatively flushing everything upon any HFENCE.GVMA
     instruction.

This patch fixes GPA passed to __kvm_riscv_hfence_gvma_vmid_gpa()
and __kvm_riscv_hfence_gvma_gpa() functions.

Fixes: fd7bb4a251df ("RISC-V: KVM: Implement VMID allocator")
Reported-by: Ian Huang <ihuang@ventanamicro.com>
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Message-Id: <20211026170136.2147619-4-anup.patel@wdc.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
arch/riscv/include/asm/kvm_host.h
arch/riscv/kvm/tlb.S