usb: dwc3: core: Only handle soft-reset in DCTL
authorThinh Nguyen <Thinh.Nguyen@synopsys.com>
Fri, 22 Apr 2022 02:33:56 +0000 (19:33 -0700)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Mon, 9 May 2022 07:14:29 +0000 (09:14 +0200)
commit7d14c96bff097ed67687a73fe4b5614a73910ac2
treea7c4617cde95be21e5a40bc56d7dec35195e7330
parent5d8299ead7c56053ffceecb350f119a27973bf51
usb: dwc3: core: Only handle soft-reset in DCTL

commit f4fd84ae0765a80494b28c43b756a95100351a94 upstream.

Make sure not to set run_stop bit or link state change request while
initiating soft-reset. Register read-modify-write operation may
unintentionally start the controller before the initialization completes
with its previous DCTL value, which can cause initialization failure.

Fixes: f59dcab17629 ("usb: dwc3: core: improve reset sequence")
Cc: <stable@vger.kernel.org>
Signed-off-by: Thinh Nguyen <Thinh.Nguyen@synopsys.com>
Link: https://lore.kernel.org/r/6aecbd78328f102003d40ccf18ceeebd411d3703.1650594792.git.Thinh.Nguyen@synopsys.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/usb/dwc3/core.c