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(parent: 12f7fb6) | patch
xilinx_timer: Fix writes into TCSR register
authorGuenter Roeck <linux@roeck-us.net>
Fri, 25 Apr 2014 15:39:48 +0000 (08:39 -0700)
committerEdgar E. Iglesias <edgar.iglesias@xilinx.com>
Mon, 12 May 2014 23:12:40 +0000 (09:12 +1000)
commit7dfba6dfbf805cf99c4ae89f6194bc9205dfbefe
tree5bbfcd2f02f1a0b819a0b91a812f2ac45989ebb8tree | snapshot
parent12f7fb60863f5aae44fa7a6c1f52cbecd29d4e9ccommit | diff
xilinx_timer: Fix writes into TCSR register

The TCSR register has only 11 valid bits. This is now used by the
linux kernel to auto-detect endianness, and causes Linux 3.15-rc1
and later to hang when run under qemu-microblaze. Mask valid bits
before writing the register to solve the problem.

Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
hw/timer/xilinx_timer.c diff | blob | history
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