dt-bindings: riscv: add SBI PMU event mappings
authorConor Dooley <conor.dooley@microchip.com>
Fri, 13 Jan 2023 20:54:35 +0000 (20:54 +0000)
committerRob Herring <robh@kernel.org>
Tue, 17 Jan 2023 20:43:55 +0000 (14:43 -0600)
commit7e38085d9c59b6d07c1986ea43d046d457dcf646
tree9a923a05897cdc8141d6c9aa068ec47d6ebf9dcd
parentfe7ce2983ba56ff482b5f275e72fb9af447fa2c8
dt-bindings: riscv: add SBI PMU event mappings

The SBI PMU extension requires a firmware to be aware of the event to
counter/mhpmevent mappings supported by the hardware. OpenSBI may use
DeviceTree to describe the PMU mappings. This binding is currently
described in markdown in OpenSBI (since v1.0 in Dec 2021) & used by QEMU
since v7.2.0.

Import the binding for use while validating dtb dumps from QEMU and
upcoming hardware (eg JH7110 SoC) that will make use of the event
mapping.

Link: https://github.com/riscv-software-src/opensbi/blob/master/docs/pmu_support.md
Link: https://github.com/riscv-non-isa/riscv-sbi-doc/blob/master/riscv-sbi.adoc
Co-developed-by: Atish Patra <atishp@rivosinc.com>
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20230113205435.122712-1-conor@kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
Documentation/devicetree/bindings/perf/riscv,pmu.yaml [new file with mode: 0644]