drm/msm/disp/dpu1: enable DATA_HCTL_EN for sc7280 target
authorKrishna Manikandan <mkrishn@codeaurora.org>
Tue, 6 Apr 2021 05:09:52 +0000 (10:39 +0530)
committerRob Clark <robdclark@chromium.org>
Wed, 7 Apr 2021 18:05:48 +0000 (11:05 -0700)
commit7e6ee55320f09cef73163ac6a2ffaca2aa17334f
tree0a503b979e04f3f7b0efb3f657a8d1302baf8581
parentb3652e87c03c70d8e6e04a17afa475f6855169d1
drm/msm/disp/dpu1: enable DATA_HCTL_EN for sc7280 target

The reset value of INTF_CONFIG2 register is changed
for SC7280 family. Changes are added to program
this register correctly based on the target.

DATA_HCTL_EN in INTF_CONFIG2 register allows data
to be transferred at a different rate than video
timing. When this is set, the number of data per
line follows DISPLAY_DATA_HCTL register value.
This change adds support to program these
registers for sc7280 target.

Signed-off-by: Krishna Manikandan <mkrishn@codeaurora.org>
Link: https://lore.kernel.org/r/1617685792-14376-5-git-send-email-mkrishn@codeaurora.org
Signed-off-by: Rob Clark <robdclark@chromium.org>
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c