clk: qcom: gcc-sm8550: use collapse-voting for PCIe GDSCs
authorKonrad Dybcio <konrad.dybcio@linaro.org>
Mon, 18 Dec 2023 16:02:06 +0000 (17:02 +0100)
committerBjorn Andersson <andersson@kernel.org>
Tue, 19 Dec 2023 17:27:03 +0000 (11:27 -0600)
commit7e77a39265293ea4f05e20fff180755503c49918
tree32f138d07f4fa29c8f9334832185364711d14e9d
parente7fe73fc6b68ee97b1e8f124a66a5ee50d8d5e5b
clk: qcom: gcc-sm8550: use collapse-voting for PCIe GDSCs

The PCIe GDSCs can be shared with other masters and should use the APCS
collapse-vote register when updating the power state.

This is specifically also needed to be able to disable power domains
that have been enabled by boot firmware using the vote register.

Following other recent Qualcomm platforms, describe this register and
the corresponding mask for the PCIe (and _phy) GDSCs.

Fixes: 955f2ea3b9e9 ("clk: qcom: Add GCC driver for SM8550")
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20231218-topic-8550_fixes-v1-5-ce1272d77540@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
drivers/clk/qcom/gcc-sm8550.c