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(parent: e1e4ce6) | patch
mlxsw: reg: Mark SFGC & some SFMR fields as reserved in CFF mode
authorPetr Machata <petrm@nvidia.com>
Mon, 20 Nov 2023 18:25:22 +0000 (19:25 +0100)
committerJakub Kicinski <kuba@kernel.org>
Tue, 21 Nov 2023 22:53:08 +0000 (14:53 -0800)
commit7eb902954b624ee338303ad735235429e036b31b
tree3ebc22261aaeba1d3b4e7db3558bea417bbb8f12tree | snapshot
parente1e4ce6c6d54ff206e55bd8c89c00bfee891458ccommit | diff
mlxsw: reg: Mark SFGC & some SFMR fields as reserved in CFF mode

Some existing fields and the whole register of SFGC are reserved in CFF
mode. Backport the reservation note to these fields.

Signed-off-by: Petr Machata <petrm@nvidia.com>
Reviewed-by: Amit Cohen <amcohen@nvidia.com>
Reviewed-by: Ido Schimmel <idosch@nvidia.com>
Link: https://lore.kernel.org/r/e1d5977a8cb778227e4ea2fd1515529957ce5de7.1700503643.git.petrm@nvidia.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
drivers/net/ethernet/mellanox/mlxsw/reg.h diff | blob | history
ep93xx device tree rework repo: git://git.maquefel.me/linux.git