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(parent: db3c01c) | patch
RISCV: KVM: Add sstateen0 context save/restore
authorMayuresh Chitale <mchitale@ventanamicro.com>
Wed, 13 Sep 2023 16:39:04 +0000 (22:09 +0530)
committerAnup Patel <anup@brainfault.org>
Thu, 12 Oct 2023 13:14:11 +0000 (18:44 +0530)
commit81f0f314fec92a69d6c4951b9d9db21d37419669
treee81ee64f7c2ab6a212e0af29a82cd8bbbac08cc8tree | snapshot
parentdb3c01c7a3081c6a6a50570e48bdbea509ba30e4commit | diff
RISCV: KVM: Add sstateen0 context save/restore

Define sstateen0 and add sstateen0 save/restore for guest VCPUs.

Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Signed-off-by: Anup Patel <anup@brainfault.org>
arch/riscv/include/asm/csr.h diff | blob | history
arch/riscv/include/asm/kvm_host.h diff | blob | history
arch/riscv/kvm/vcpu.c diff | blob | history
ep93xx device tree rework repo: git://git.maquefel.me/linux.git