bsd-user: Implement RISC-V TLS register setup
authorMark Corbin <mark@dibsco.co.uk>
Mon, 16 Sep 2024 15:51:06 +0000 (01:51 +1000)
committerAlistair Francis <alistair.francis@wdc.com>
Wed, 2 Oct 2024 05:11:52 +0000 (15:11 +1000)
commit83726b77983df7b3ed11023b9fd36b82e710c2aa
tree19029ed9b758d1543bdadb31f3ddf150fc3e18b9
parent5341bf6afe86895be900e1709b62f9d4af9f97d8
bsd-user: Implement RISC-V TLS register setup

Included the prototype for the 'target_cpu_set_tls' function in the
'target_arch.h' header file. This function is responsible for setting
the Thread Local Storage (TLS) register for RISC-V architecture.

Signed-off-by: Mark Corbin <mark@dibsco.co.uk>
Signed-off-by: Ajeet Singh <itachis@FreeBSD.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20240916155119.14610-5-itachis@FreeBSD.org>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
bsd-user/riscv/target_arch.h [new file with mode: 0644]
bsd-user/riscv/target_arch_cpu.c [new file with mode: 0644]