target/riscv: rvv-1.0: fix address index overflow bug of indexed load/store insns
authorFrank Chang <frank.chang@sifive.com>
Fri, 10 Dec 2021 07:56:08 +0000 (15:56 +0800)
committerAlistair Francis <alistair.francis@wdc.com>
Mon, 20 Dec 2021 04:51:36 +0000 (14:51 +1000)
commit83fcd573b121939e850d9a9836e24298d189aa79
tree3e0f634a51664022d2e95a25797710895016822d
parent08b9d0ed4aaff095a940280eba1321e3414dd5ac
target/riscv: rvv-1.0: fix address index overflow bug of indexed load/store insns

Replace ETYPE from signed int to unsigned int to prevent index overflow
issue, which would lead to wrong index address.

Signed-off-by: Frank Chang <frank.chang@sifive.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20211210075704.23951-23-frank.chang@sifive.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
target/riscv/vector_helper.c