irqchip/gic-v3-its: Handle non-coherent GICv4 redistributors
authorMarc Zyngier <maz@kernel.org>
Tue, 13 Feb 2024 10:12:04 +0000 (10:12 +0000)
committerThomas Gleixner <tglx@linutronix.de>
Tue, 13 Feb 2024 10:29:51 +0000 (11:29 +0100)
commit846297e11e8ae428f8b00156a0cfe2db58100702
treece25be9bf3d3ac967cd443789839d005818d4b4f
parent8ad032cc8c499af6f3289c796f411e8874b50fdb
irqchip/gic-v3-its: Handle non-coherent GICv4 redistributors

Although the GICv3 code base has gained some handling of systems failing to
handle the shareability attributes, the GICv4 side of things has been
firmly ignored.

This is unfortunate, as the new recent addition of the "dma-noncoherent" is
supposed to apply to all of the GICR tables, and not just the ones that are
common to v3 and v4.

Add some checks to handle the VPROPBASE/VPENDBASE shareability and
cacheability attributes in the same way we deal with the other GICR_BASE
registers, wrapping the flag check in a helper for improved readability.

Note that this has been found by inspection only, as I don't have access to
HW that suffers from this particular issue.

Fixes: 3a0fff0fb6a3 ("irqchip/gic-v3: Enable non-coherent redistributors/ITSes DT probing")
Signed-off-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
Link: https://lore.kernel.org/r/20240213101206.2137483-2-maz@kernel.org
drivers/irqchip/irq-gic-v3-its.c