ASoC: es8316: Enable support for MCLK div by 2

ASoC: es8316: Enable support for MCLK div by 2

To properly support a line of Huawei laptops with an AMD CPU
and an ES8336 codec connected to the ACP3X module, we need
to enable the codec option to divide the MCLK by 2.
This is needed because for at least one SKU that has a 48Mhz
MCLK the sound is distorted unless the MCLK div by 2 option
is enabled.

The option to divide the MCLK will first be tried. If no suitable
clocking can be generated from this frequency, then the normal
non-halved MCLK frequency will be tried.

Signed-off-by: Marian Postevca <posteuca@mutex.one>
Link: https://lore.kernel.org/r/20230829220116.1159-4-posteuca@mutex.one
Signed-off-by: Mark Brown <broonie@kernel.org>