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(parent: 25e0e5a) | patch
drm/i915/display: Add CDCLK Support for MTL
authorAnusha Srivatsa <anusha.srivatsa@intel.com>
Thu, 17 Nov 2022 23:00:02 +0000 (15:00 -0800)
committerAnusha Srivatsa <anusha.srivatsa@intel.com>
Mon, 21 Nov 2022 23:19:50 +0000 (15:19 -0800)
commit86c0ef7234a7c517b010fd5ecf1e176127bce521
tree045520629dc6d39faf5ea8754141def934f19cddtree | snapshot
parent25e0e5ae561003817797c23ae3b85cf510be11c5commit | diff
drm/i915/display: Add CDCLK Support for MTL

As per bSpec MTL has 38.4 MHz Reference clock.
Adding the cdclk tables and cdclk_funcs that MTL
will use.

v2: Revert to using bxt_get_cdclk()

BSpec: 65243

Cc: Clint Taylor <Clinton.A.Taylor@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Reviewed-by: Clint Taylor <Clinton.A.Taylor@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20221117230002.792096-3-anusha.srivatsa@intel.com
drivers/gpu/drm/i915/display/intel_cdclk.c diff | blob | history
ep93xx device tree rework repo: git://git.maquefel.me/linux.git