dt-bindings: riscv: add Zihintntl ISA extension description
authorClément Léger <cleger@rivosinc.com>
Tue, 14 Nov 2023 14:12:50 +0000 (09:12 -0500)
committerPalmer Dabbelt <palmer@rivosinc.com>
Tue, 12 Dec 2023 23:45:11 +0000 (15:45 -0800)
commit892f10c8d6ca4b3c12d149085243ad8cd75f09b3
treed1c85682e3f8493e70ebd23721627270d3093bbc
parent74ba42b250a7339c72e5803490b1ea42c3556f26
dt-bindings: riscv: add Zihintntl ISA extension description

Add description for Zihintntl ISA extension[1].

Link: https://drive.google.com/file/d/13_wsN8YmRfH8YWysFyTX-DjTkCnBd9hj/view
Signed-off-by: Clément Léger <cleger@rivosinc.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20231114141256.126749-15-cleger@rivosinc.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Documentation/devicetree/bindings/riscv/extensions.yaml