riscv: report perf event for misaligned fault
authorClément Léger <cleger@rivosinc.com>
Wed, 4 Oct 2023 15:14:00 +0000 (17:14 +0200)
committerPalmer Dabbelt <palmer@rivosinc.com>
Wed, 1 Nov 2023 15:34:54 +0000 (08:34 -0700)
commit89c12fecdc4d46c1f08a81dab5d305304cc626eb
tree068e35d054b3aef9078ee2ba7ae76d8061c847ce
parent7c83232161f609bbc452a1255f823f41afc411dd
riscv: report perf event for misaligned fault

Add missing calls to account for misaligned fault event using
perf_sw_event().

Signed-off-by: Clément Léger <cleger@rivosinc.com>
Reviewed-by: Björn Töpel <bjorn@rivosinc.com>
Link: https://lore.kernel.org/r/20231004151405.521596-4-cleger@rivosinc.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
arch/riscv/kernel/traps_misaligned.c