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(parent: ff679b5) | patch
target/riscv: rvv-1.0: relax RV_VLEN_MAX to 1024-bits
authorFrank Chang <frank.chang@sifive.com>
Fri, 10 Dec 2021 07:56:51 +0000 (15:56 +0800)
committerAlistair Francis <alistair.francis@wdc.com>
Mon, 20 Dec 2021 04:53:31 +0000 (14:53 +1000)
commit8a4b52575ab1793f5cc86ddd0b5e986799dfc615
tree4e215398d979c8da2e01ac0c0e8a22de7d233529tree | snapshot
parentff679b58e3efed7b03dcd08ea7f9018978a084e5commit | diff
target/riscv: rvv-1.0: relax RV_VLEN_MAX to 1024-bits

Signed-off-by: Frank Chang <frank.chang@sifive.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20211210075704.23951-66-frank.chang@sifive.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
target/riscv/cpu.h diff | blob | history
target/riscv/insn_trans/trans_rvv.c.inc diff | blob | history
target/riscv/vector_helper.c diff | blob | history
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