drm/i915: Fix g4x/vlv/chv CxSR vs. format/tiling/rotation changes
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Wed, 22 Jun 2022 15:54:49 +0000 (18:54 +0300)
committerVille Syrjälä <ville.syrjala@linux.intel.com>
Fri, 7 Oct 2022 17:09:49 +0000 (20:09 +0300)
commit8c45f31c320d0a49e5cd8621db07e4b3701c52a7
treeaaec6d973a795a1161e30f982925c67aaad78075
parenta2b1d9ecaa755c4795a84a046b075bbf351cd6af
drm/i915: Fix g4x/vlv/chv CxSR vs. format/tiling/rotation changes

On g4x/vlv/chv the hardware seems incapable of changing the pixel
format, rotation, or YUV->RGB CSC matrix while in CxSR.

Additionally on VLV/CHV the sprites seem incapable of tiling
changes while in CxSR. On g4x CxSR is not even possible with
the sprite enabled. Curiously the primary plane seems perfectly
happy when changing tiling during CxSR.

Pimp up the code to account for these when determining whether
CxSR needs to be disabled. Since it looks like most of the plane
control register bits are affected let's just compare that.
But in the name of efficiency we'll make an exception for the
primary plane tiling changes (avoids some extra vblank waits).

v2: Just use the pre-computed plane control register values

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220622155452.32587-7-ville.syrjala@linux.intel.com
Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
drivers/gpu/drm/i915/display/intel_atomic_plane.c