iio: imu: adis: ensure proper DMA alignment
authorNuno Sa <nuno.sa@analog.com>
Wed, 17 Jan 2024 13:10:49 +0000 (14:10 +0100)
committerJonathan Cameron <Jonathan.Cameron@huawei.com>
Mon, 22 Jan 2024 18:59:07 +0000 (18:59 +0000)
commit8e98b87f515d8c4bae521048a037b2cc431c3fd5
tree84ab2c3b517d7db0bb08b4d2eac409a1a497ad97
parentf1dfcbaa7b9d131859b0167c428480ae6e7e817d
iio: imu: adis: ensure proper DMA alignment

Aligning the buffer to the L1 cache is not sufficient in some platforms
as they might have larger cacheline sizes for caches after L1 and thus,
we can't guarantee DMA safety.

That was the whole reason to introduce IIO_DMA_MINALIGN in [1]. Do the same
for the sigma_delta ADCs.

[1]: https://lore.kernel.org/linux-iio/20220508175712.647246-2-jic23@kernel.org/

Fixes: ccd2b52f4ac6 ("staging:iio: Add common ADIS library")
Signed-off-by: Nuno Sa <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20240117-adis-improv-v1-1-7f90e9fad200@analog.com
Cc: <Stable@vger.kernel.org>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
include/linux/iio/imu/adis.h