target/riscv: Wake on VS-level external interrupts
authorAndrew Bresticker <abrestic@rivosinc.com>
Tue, 31 May 2022 21:05:44 +0000 (17:05 -0400)
committerAlistair Francis <alistair.francis@wdc.com>
Thu, 9 Jun 2022 23:31:42 +0000 (09:31 +1000)
commit8f42415fc1d1bb462f2001bf5e2ad3b78f14b2e3
treece324aa7b30eb2a0d9688d07787483229c2781cc
parentaf9751316e53cdf7e98131afe6928a5f4445fe16
target/riscv: Wake on VS-level external interrupts

Whether or not VSEIP is pending isn't reflected in env->mip and must
instead be determined from hstatus.vgein and hgeip. As a result a
CPU in WFI won't wake on a VSEIP, which violates the WFI behavior as
specified in the privileged ISA. Just use riscv_cpu_all_pending()
instead, which already accounts for VSEIP.

Signed-off-by: Andrew Bresticker <abrestic@rivosinc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20220531210544.181322-1-abrestic@rivosinc.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
target/riscv/cpu.c
target/riscv/cpu.h
target/riscv/cpu_helper.c