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(parent: e5688f6) | patch
net/mlx5: Bridge, increase bridge tables sizes
authorVlad Buslov <vladbu@nvidia.com>
Thu, 5 Jan 2023 14:28:29 +0000 (15:28 +0100)
committerSaeed Mahameed <saeedm@nvidia.com>
Wed, 12 Apr 2023 03:57:36 +0000 (20:57 -0700)
commit9071b423c302b70eff80da715d724c4e75c1c46a
tree55c2a1b04535cacf1bbbd82c40e8f15d9b05d3a7tree | snapshot
parente5688f6fb9e3d0254a8fb1c714c38e407f0baa64commit | diff
net/mlx5: Bridge, increase bridge tables sizes

Bridge ingress and egress tables got more flow groups recently for QinQ
support and will get more in following patches of this series. Increase the
sizes of the tables to allow offloading more flows in each mode.

Signed-off-by: Vlad Buslov <vladbu@nvidia.com>
Reviewed-by: Maor Dickman <maord@nvidia.com>
Reviewed-by: Roi Dayan <roid@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
drivers/net/ethernet/mellanox/mlx5/core/esw/bridge.c diff | blob | history
ep93xx device tree rework repo: git://git.maquefel.me/linux.git