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(parent: 7b616f3) | patch
target/sparc: Fix FMUL8x16
authorRichard Henderson <richard.henderson@linaro.org>
Thu, 2 May 2024 16:55:24 +0000 (09:55 -0700)
committerMark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Sun, 5 May 2024 20:02:48 +0000 (21:02 +0100)
commit9157dccc7e71f7c94581c38f38acbef9a21bbe9a
tree85aa5a01a7840388929584f7d9e40c2caed2a981tree | snapshot
parent7b616f36de0bde126e1ba6b0793ed26fc414a1ffcommit | diff
target/sparc: Fix FMUL8x16

This instruction has f32 as source1, which alters the
decoding of the register number, which means we've been
passing the wrong data for odd register numbers.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20240502165528.244004-4-richard.henderson@linaro.org>
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
target/sparc/helper.h diff | blob | history
target/sparc/translate.c diff | blob | history
target/sparc/vis_helper.c diff | blob | history
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