hw/riscv: opentitan: Use MachineState::ram and MachineClass::default_ram_id
authorBin Meng <bmeng.cn@gmail.com>
Wed, 20 Oct 2021 01:41:08 +0000 (09:41 +0800)
committerAlistair Francis <alistair.francis@wdc.com>
Fri, 22 Oct 2021 13:35:47 +0000 (23:35 +1000)
commit91b1fbdc0cca11ac23ddc61ee3ea0e9706b645cf
tree4f84b8f112b63eef6f9f3a358f4b22f3ed064d52
parentd4c624f482778cfe91938996a588df2df0e70f20
hw/riscv: opentitan: Use MachineState::ram and MachineClass::default_ram_id

Using memory_region_init_ram(), which can't possibly handle vhost-user,
and can't work as expected with '-numa node,memdev' options.

Use MachineState::ram instead of manually initializing RAM memory
region, as well as by providing MachineClass::default_ram_id to
opt in to memdev scheme.

While at it add check for user supplied RAM size and error out if it
mismatches board expected value.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
Message-id: 20211020014112.7336-3-bmeng.cn@gmail.com
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
hw/riscv/opentitan.c