media: ccs-pll: Use correct VT divisor for calculating VT SYS divisor
authorSakari Ailus <sakari.ailus@linux.intel.com>
Tue, 1 Sep 2020 11:08:26 +0000 (13:08 +0200)
committerMauro Carvalho Chehab <mchehab+huawei@kernel.org>
Mon, 7 Dec 2020 14:36:11 +0000 (15:36 +0100)
commit9454432af0c874eba7abb1abb76bbf62950a9087
tree3c77bbbc30dfbe0afba1229709e3d9767c7b3318
parent415ddd9939783cb79790aba1833ea39fd335caed
media: ccs-pll: Use correct VT divisor for calculating VT SYS divisor

Use the correct video timing divisor to calculate the SYS divisor. Instead
of the current value, the minimum was used. This could have resulted in a
too low SYS divisor.

Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
drivers/media/i2c/ccs-pll.c