Merge tag 'pull-target-arm-
20241213' of https://git.linaro.org/people/pmaydell/qemu-arm into staging
target-arm queue:
* Finish conversion of A64 decoder to decodetree
* Use float_round_to_odd in helper_fcvtx_f64_to_f32
* Move TLBI insn emulation code out to its own source file
* docs/system/arm: fix broken links, document undocumented properties
* MAINTAINERS: correct an email address
# -----BEGIN PGP SIGNATURE-----
#
# iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmdcYCcZHHBldGVyLm1h
# eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3usmD/9x6yTRxIK2mi0CjY0Bii89
# hL1Z3n2bxRDu+WoMcsQKXQM5RcixILJyMsnArOxI3D1bVEkAskuaVcXL0uS7Inq6
# EkEq8Z5lfRikAP698U2tzaGhKRiE4NT/cNgOoFLddkjqvZ1tq3sSbPcCudSWkP+u
# Z3c5etP8llGNhokNhKmIifE/auxiFdPh8JRXHAF3KhNu4VOX7gNWnt4YZNhnV2XN
# TsD+IxU9LCfI8pIFK95zBUIQT/361lIoiY/r7RpN21HeEuS+4wXT/Vfii6rEgsg5
# pNkPoxX/Tc+67l4wXzgoV/p2I1KZbJZ/s7Ta5wLmopidwi2EP9ETVcfTzKIF+PIJ
# 08nozInD+fxlyGBezTRDmuIKiC4t1lVW8TP8znyp3TcSHFs5Q/iQY0uPACzoUVuE
# chMIt4dD6NlMxOanWANbsVlF+ZPc8MVBMz3zHVbvkOiogoRQYjuDqQIQAhLbQolg
# uC/ql79WnUe0IX1j9rcW7+DVNq/bObLCN89uSjigHO2bo5FKKr4pnOG/SaAyER5L
# T/OHy1ACcxGNVIiUwKEDxdQ5iwcl+GEJfMfrpJHlTzxeZggL2lE0mcpXaHGLTzXV
# K7fSOBI15T+aRqN0/29Rtsw8ayMV5/RmnanesPmC2VN86ZCE0OKGOcLEdaI+q3iT
# CMxIsCUCpMM4WjbdJ69ZgQ==
# =wQ1l
# -----END PGP SIGNATURE-----
# gpg: Signature made Fri 13 Dec 2024 11:26:15 EST
# gpg: using RSA key
E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg: issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [full]
# gpg: aka "Peter Maydell <pmaydell@gmail.com>" [full]
# gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [full]
# gpg: aka "Peter Maydell <peter@archaic.org.uk>" [unknown]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE
* tag 'pull-target-arm-
20241213' of https://git.linaro.org/people/pmaydell/qemu-arm: (85 commits)
target/arm: Simplify condition for tlbi_el2_cp_reginfo[]
target/arm: Move RME TLB insns to tlb-insns.c
target/arm: Move small helper functions to tlb-insns.c
target/arm: Move the TLBI OS insns to tlb-insns.c.
target/arm: Move TLBI range insns
target/arm: Move AArch64 EL3 TLBI insns
target/arm: Move the AArch64 EL2 TLBI insns
target/arm: Move AArch64 TLBI insns from v8_cp_reginfo[]
target/arm: Move TLBI insns for AArch32 EL2 to tlbi_insn_helper.c
target/arm: Move some TLBI insns to their own source file
MAINTAINERS: correct my email address
docs/system/arm/virt: document missing properties
docs/system/arm/xlnx-versal-virt: document ospi-flash property
docs/system/arm/fby35: document execute-in-place property
docs/system/arm/orangepi: update links
target/arm: Use float_round_to_odd in helper_fcvtx_f64_to_f32
target/arm: Convert FCVTL to decodetree
target/arm: Convert URECPE and URSQRTE to decodetree
target/arm: Introduce gen_gvec_urecpe, gen_gvec_ursqrte
target/arm: Convert FRECPE, FRECPX, FRSQRTE to decodetree
...
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>