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target-arm: A64: Implement 2-register misc compares, ABS, NEG
authorPeter Maydell <peter.maydell@linaro.org>
Mon, 3 Feb 2014 23:31:51 +0000 (23:31 +0000)
committerPeter Maydell <peter.maydell@linaro.org>
Sat, 8 Feb 2014 14:47:28 +0000 (14:47 +0000)
commit94b6c911c644de8621b7be48b0fa0f9c2b7a2122
treea55baa29a971c91c7f459b1a1942634b5d4f1004tree | snapshot
parent45aecc6dbb9e282bd880d155f80018a192c90ff2commit | diff
target-arm: A64: Implement 2-register misc compares, ABS, NEG

Implement the simple 2-register-misc operations we can share
with the scalar-two-register-misc code. (SUQADD, USQADD, SQABS,
SQNEG also fall into this category, but aren't implemented in
the scalar-2-register case yet either.)

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
target-arm/translate-a64.c diff | blob | history
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