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(parent: f85d66f) | patch
target/arm: add data cache invalidation cp15 instruction to cortex-r5
authorLuc MICHEL <luc.michel@git.antfield.fr>
Fri, 28 Apr 2017 12:56:32 +0000 (14:56 +0200)
committerMichael Tokarev <mjt@tls.msk.ru>
Sun, 4 Jun 2017 15:42:55 +0000 (18:42 +0300)
commit95e9a242e2a393c7d4e5cc04340e39c3a9420f03
tree1af7bd97b8a1b97d545549896b1fa24534bf5213tree | snapshot
parentf85d66f47feffc1a223d8336022b17a3c7aafd47commit | diff
target/arm: add data cache invalidation cp15 instruction to cortex-r5

The cp15, CRn=15, opc1=0, CRm=5, opc2=0 instruction invalidates all the
data cache on the cortex-r5. Implementing it as a NOP.

Signed-off-by: Luc MICHEL <luc.michel@git.antfield.fr>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
target/arm/cpu.c diff | blob | history
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