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target/mips/mxu: Add S16LDD S16STD S16LDI S16SDI instructions
authorSiarhei Volkau <lis8215@gmail.com>
Thu, 8 Jun 2023 10:42:10 +0000 (13:42 +0300)
committerPhilippe Mathieu-Daudé <philmd@linaro.org>
Mon, 10 Jul 2023 21:33:38 +0000 (23:33 +0200)
commit968045b6c773fa61e48e4ca303f1acc9b54e4270
tree9fdd43da4ade30ffb9179a894f7ba5eace6459d7tree | snapshot
parent3f0e94c1348d29451db94fb0ebdbaf6fdda1c730commit | diff
target/mips/mxu: Add S16LDD S16STD S16LDI S16SDI instructions

These instructions are all load/store a halfword from memory
and put it into/get it from MXU register in various combinations.
I-suffix instructions modify the base address GPR by offset provided.

Signed-off-by: Siarhei Volkau <lis8215@gmail.com>
Message-Id: <20230608104222.1520143-22-lis8215@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
target/mips/tcg/mxu_translate.c diff | blob | history
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