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(parent: 49c5611) | patch
target/riscv: introduce floating-point rounding mode enum
authorFrank Chang <frank.chang@sifive.com>
Fri, 10 Dec 2021 07:56:46 +0000 (15:56 +0800)
committerAlistair Francis <alistair.francis@wdc.com>
Mon, 20 Dec 2021 04:53:31 +0000 (14:53 +1000)
commit986c895de17c332c8cb241333dd478cb2ce8b8cc
treeac72fa4cc2994613da7c8e7fd7e518adc33314e6tree | snapshot
parent49c5611a9716963759d36b80b278d68e4335f9d7commit | diff
target/riscv: introduce floating-point rounding mode enum

Signed-off-by: Frank Chang <frank.chang@sifive.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20211210075704.23951-61-frank.chang@sifive.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
target/riscv/fpu_helper.c diff | blob | history
target/riscv/insn_trans/trans_rvv.c.inc diff | blob | history
target/riscv/internals.h diff | blob | history
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