drm/i915/d12+: Disable DMC firmware flip queue handlers
authorImre Deak <imre.deak@intel.com>
Sat, 21 May 2022 13:08:08 +0000 (16:08 +0300)
committerImre Deak <imre.deak@intel.com>
Mon, 23 May 2022 13:49:24 +0000 (16:49 +0300)
commit991dcb89caeb1b9bf714b382e23d3f6d8016e744
treeb7bce4ad70c672856ab902d41d7ba54077e90819
parent39b1bc4b5bcccac781267bb826b035fbb99c8b9d
drm/i915/d12+: Disable DMC firmware flip queue handlers

Based on a bspec update the DMC firmware's flip queue handling events
need to be disabled before enabling DC5/6. i915 doesn't use the flip
queue feature atm, so disable it already after loading the firmware.
This removes some overhead of the event handler which runs at a 1 kHz
frequency.

Bspec: 49193, 72486, 72487

v2:
- Fix the DMC pipe A register offsets for GEN12.
- Disable the events on DG2 only on pipe A..D .
v3: (Lucas)
- Add TODO: to clarify the disabling sequence on all D13+
- s/intel_dmc_has_fw_payload/has_dmc_id_fw/
- s/simple_flipq/flipq/
- s/_GEN12,_GEN13/TGL_,ADLP_/
- s/MAINDMC/DMC/
v4:
- Only disable flip queues on TGL/DG2, as on other platforms the
  corresponding event handlers don't exist.

Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com> # v1
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220521130808.637449-1-imre.deak@intel.com
drivers/gpu/drm/i915/display/intel_dmc.c
drivers/gpu/drm/i915/display/intel_dmc_regs.h