target/riscv: Add Tenstorrent Ascalon CPU
authorAnton Blanchard <antonb@tenstorrent.com>
Wed, 13 Nov 2024 11:04:59 +0000 (22:04 +1100)
committerAlistair Francis <alistair.francis@wdc.com>
Fri, 20 Dec 2024 01:22:47 +0000 (11:22 +1000)
commit997570359ecd11347ecadf309b485f7ce7bd018e
tree54c406040199587712690c573887c515bee7b8f9
parent1c187ad5c06a45c083d5d24b2db62af5504880a2
target/riscv: Add Tenstorrent Ascalon CPU

Add a CPU entry for the Tenstorrent Ascalon CPU, a series of 2 wide to
8 wide RV64 cores. More details can be found at
https://tenstorrent.com/ip/tt-ascalon

Signed-off-by: Anton Blanchard <antonb@tenstorrent.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Message-ID: <20241113110459.1607299-1-antonb@tenstorrent.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
target/riscv/cpu-qom.h
target/riscv/cpu.c