projects / qemu.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: 11d0fc1) | patch
target/mips: Fix pre-nanoMIPS MT ASE instructions availability control
authorAleksandar Rikalo <arikalo@wavecomp.com>
Tue, 7 Aug 2018 10:49:38 +0000 (12:49 +0200)
committerAleksandar Markovic <amarkovic@wavecomp.com>
Fri, 24 Aug 2018 15:51:59 +0000 (17:51 +0200)
commit9affc1c59279f482ff145e0371926f79b6448e3e
tree7ce3d57869f58a9907cc0461e49685e9c583d23ctree | snapshot
parent11d0fc10b7efe3d0404a71e855c0d9f521ce3d66commit | diff
target/mips: Fix pre-nanoMIPS MT ASE instructions availability control

Use bits from configuration registers for availability control
of MT ASE instructions, rather than only ISA_MT bit in insn_flags.
This is done by adding a field in hflags for MT bit, and adding
functions check_mt() and check_cp0_mt().

Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Stefan Markovic <smarkovic@wavecomp.com>
target/mips/translate.c diff | blob | history
Unnamed repository; edit this file 'description' to name the repository.