cache: ax45mp_cache: Align end size to cache boundary in ax45mp_dma_cache_wback()
authorLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Sat, 3 Feb 2024 21:26:40 +0000 (21:26 +0000)
committerConor Dooley <conor.dooley@microchip.com>
Wed, 21 Feb 2024 16:24:10 +0000 (16:24 +0000)
commit9bd405c48b0ac4de087c0c4440fd79597201b8a7
treed54faaeb05d7cdaf7923a67cf0a3315120dc4546
parent6613476e225e090cc9aad49be7fa504e290dd33d
cache: ax45mp_cache: Align end size to cache boundary in ax45mp_dma_cache_wback()

Align the end size to cache boundary size in ax45mp_dma_cache_wback()
callback likewise done in ax45mp_dma_cache_inv() callback.

Additionally return early in case of start == end.

Fixes: d34599bcd2e4 ("cache: Add L2 cache management for Andes AX45MP RISC-V core")
Reported-by: Pavel Machek <pavel@denx.de>
Link: https://lore.kernel.org/cip-dev/ZYsdKDiw7G+kxQ3m@duo.ucw.cz/
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
drivers/cache/ax45mp_cache.c