RISC-V: KVM: Implement stage2 page table programming
authorAnup Patel <anup.patel@wdc.com>
Mon, 27 Sep 2021 11:40:09 +0000 (17:10 +0530)
committerAnup Patel <anup@brainfault.org>
Mon, 4 Oct 2021 10:32:19 +0000 (16:02 +0530)
commit9d05c1fee837572d91f2b5463d67d4e098987e95
tree20bd9ca4c62f902083a58f40b90f9a3064246014
parentfd7bb4a251dfc1da3496bf59a4793937c13e8c1f
RISC-V: KVM: Implement stage2 page table programming

This patch implements all required functions for programming
the stage2 page table for each Guest/VM.

At high-level, the flow of stage2 related functions is similar
from KVM ARM/ARM64 implementation but the stage2 page table
format is quite different for KVM RISC-V.

[jiangyifei: stage2 dirty log support]
Signed-off-by: Yifei Jiang <jiangyifei@huawei.com>
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Acked-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Acked-by: Palmer Dabbelt <palmerdabbelt@google.com>
arch/riscv/include/asm/kvm_host.h
arch/riscv/kvm/Kconfig
arch/riscv/kvm/main.c
arch/riscv/kvm/mmu.c
arch/riscv/kvm/vm.c