target/riscv: Add CTR sctrclr instruction.
authorRajnesh Kanwal <rkanwal@rivosinc.com>
Wed, 5 Feb 2025 11:18:49 +0000 (11:18 +0000)
committerAlistair Francis <alistair.francis@wdc.com>
Tue, 4 Mar 2025 05:42:54 +0000 (15:42 +1000)
commit9e69e760fdc34a9d13a8c434d6a9fada835a05ad
tree0bccb6e7b933441c596749c12a319661c748a4b1
parent4ff7a27adce4c880d2137788da0fc57d75ee80be
target/riscv: Add CTR sctrclr instruction.

CTR extension adds a new instruction sctrclr to quickly
clear the recorded entries buffer.

Signed-off-by: Rajnesh Kanwal <rkanwal@rivosinc.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Message-ID: <20250205-b4-ctr_upstream_v6-v6-5-439d8e06c8ef@rivosinc.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
target/riscv/cpu.h
target/riscv/cpu_helper.c
target/riscv/helper.h
target/riscv/insn32.decode
target/riscv/insn_trans/trans_privileged.c.inc
target/riscv/op_helper.c