drm/amdgpu: access RLC_SPM_MC_CNTL through MMIO in SRIOV runtime
authorZhenGuo Yin <zhenguo.yin@amd.com>
Mon, 28 Aug 2023 06:18:52 +0000 (14:18 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 30 Aug 2023 19:51:16 +0000 (15:51 -0400)
commit9f05cfc78c6880e06940ea78fbc43f6392710f17
tree487f3f0fb763ba038e4f78212142aba7801f5370
parent668dfc4533262b169554f0b8dedb5ce3545d5d06
drm/amdgpu: access RLC_SPM_MC_CNTL through MMIO in SRIOV runtime

Register RLC_SPM_MC_CNTL is not blocked by L1 policy, VF can
directly access it through MMIO during SRIOV runtime.

v2: use SOC15 interface to access registers

Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: ZhenGuo Yin <zhenguo.yin@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c