target/riscv: Add support for Zve32x extension
authorJason Chien <jason.chien@sifive.com>
Thu, 28 Mar 2024 02:23:10 +0000 (10:23 +0800)
committerAlistair Francis <alistair.francis@wdc.com>
Mon, 3 Jun 2024 01:12:12 +0000 (11:12 +1000)
commit9fb41a4418efb6008bce218d9510db830fd744ab
tree9b962ac705aa893c7cbf2ca8404361770dbf4bcf
parentf15af01740efb95d1dccdac763011dcba144c1fe
target/riscv: Add support for Zve32x extension

Add support for Zve32x extension and replace some checks for Zve32f with
Zve32x, since Zve32f depends on Zve32x.

Signed-off-by: Jason Chien <jason.chien@sifive.com>
Reviewed-by: Frank Chang <frank.chang@sifive.com>
Reviewed-by: Max Chou <max.chou@sifive.com>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Message-ID: <20240328022343.6871-2-jason.chien@sifive.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
target/riscv/cpu.c
target/riscv/cpu_cfg.h
target/riscv/cpu_helper.c
target/riscv/csr.c
target/riscv/insn_trans/trans_rvv.c.inc
target/riscv/tcg/tcg-cpu.c