hw/ssi: Fix Linux driver init issue with xilinx_spi
authorChris Rauer <crauer@google.com>
Mon, 3 Apr 2023 15:12:30 +0000 (16:12 +0100)
committerPeter Maydell <peter.maydell@linaro.org>
Mon, 3 Apr 2023 15:12:30 +0000 (16:12 +0100)
commita0eaa126af3c5a43937a22c58cfb9bb36e4a5001
treebdbef633077156b97c991c79efd5bbd27ba67168
parent782781e85decfd85a6d9b064be741fb30d4fd307
hw/ssi: Fix Linux driver init issue with xilinx_spi

The problem is that the Linux driver expects the master transaction inhibit
bit(R_SPICR_MTI) to be set during driver initialization so that it can
detect the fifo size but QEMU defaults it to zero out of reset.  The
datasheet indicates this bit is active on reset.

See page 25, SPI Control Register section:
https://www.xilinx.com/content/dam/xilinx/support/documents/ip_documentation/axi_quad_spi/v3_2/pg153-axi-quad-spi.pdf

Signed-off-by: Chris Rauer <crauer@google.com>
Message-id: 20230323182811.2641044-1-crauer@google.com
Reviewed-by: Edgar E. Iglesias <edgar@zeroasic.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
hw/ssi/xilinx_spi.c