drm/xe: Add PVC gt workarounds
authorLucas De Marchi <lucas.demarchi@intel.com>
Tue, 14 Mar 2023 00:30:04 +0000 (17:30 -0700)
committerRodrigo Vivi <rodrigo.vivi@intel.com>
Tue, 19 Dec 2023 23:29:49 +0000 (18:29 -0500)
commita19220fa5f1a740d98654ee1d6cf11a8e0158018
tree0fb255616f656b2c12a8114377a4e94d1749b0d5
parent6b5ccd6360e29e67a760f82d0b28cf7c058732f7
drm/xe: Add PVC gt workarounds

Synchronize with i915 the PVC gt workarounds as of committ
commit 4d14d7717f19 ("drm/i915/selftest: Fix ktime_get() and h/w
access order").

v2: Add masked flag to XEHPC_LNCFMISCCFGREG0 (Matt Roper)

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://lore.kernel.org/r/20230314003012.2600353-7-lucas.demarchi@intel.com
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
drivers/gpu/drm/xe/regs/xe_gt_regs.h
drivers/gpu/drm/xe/xe_wa.c