RISC-V: selftests: Add CBO tests
authorAndrew Jones <ajones@ventanamicro.com>
Mon, 18 Sep 2023 13:15:25 +0000 (15:15 +0200)
committerPalmer Dabbelt <palmer@rivosinc.com>
Thu, 21 Sep 2023 11:22:28 +0000 (04:22 -0700)
commita29e2a48afe3549ee34d39cf42343ba3fced09c6
tree398dd76acdfc9375cd0d232a4fe8015416880001
parent2f248e0f8a6aa7199f435d77d94b53cf647e7d7b
RISC-V: selftests: Add CBO tests

Add hwprobe test for Zicboz and its block size. Also, when Zicboz is
present, test that cbo.zero may be issued and works. Additionally
provide a command line option that enables testing that the Zicbom
instructions cause SIGILL and also that cbo.zero causes SIGILL when
Zicboz it's not present. The SIGILL tests require "opt-in" with a
command line option because the RISC-V ISA does not require
unimplemented standard opcodes to issue illegal-instruction
exceptions (but hopefully most platforms do).

Pinning the test to a subset of cpus with taskset will also restrict
the hwprobe calls to that set.

Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Xiao Wang <xiao.w.wang@intel.com>
Link: https://lore.kernel.org/r/20230918131518.56803-14-ajones@ventanamicro.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
tools/testing/selftests/riscv/hwprobe/Makefile
tools/testing/selftests/riscv/hwprobe/cbo.c [new file with mode: 0644]
tools/testing/selftests/riscv/hwprobe/hwprobe.c
tools/testing/selftests/riscv/hwprobe/hwprobe.h [new file with mode: 0644]