riscv: dts: renesas: r9a07g043f: Add L2 cache node
authorLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Fri, 29 Sep 2023 00:07:00 +0000 (01:07 +0100)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Thu, 5 Oct 2023 12:25:00 +0000 (14:25 +0200)
commita38b1061d327c120844e5dc0217191b06ce3b25f
treee07fd90cd562d613d17ef022558f58768c627a86
parent587c848ac3ea69fcecef7b4814c2a51bbda727a3
riscv: dts: renesas: r9a07g043f: Add L2 cache node

Add L2 cache node for RZ/Five SoC.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20230929000704.53217-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
arch/riscv/boot/dts/renesas/r9a07g043f.dtsi