target/riscv: Hoist second stage mode change to callers
authorRichard Henderson <richard.henderson@linaro.org>
Wed, 12 Apr 2023 11:43:26 +0000 (13:43 +0200)
committerAlistair Francis <alistair.francis@wdc.com>
Fri, 5 May 2023 00:49:50 +0000 (10:49 +1000)
commita427c83633924d2bc9485d30c2658dd9fc44b9f1
tree62195579c7977f4e32db4234fce39b8d221e82a7
parenteaecd473ca0e91c59dcf8a9e58b32518ed6b1bdf
target/riscv: Hoist second stage mode change to callers

Move the check from the top of get_physical_address to
the two callers, where passing mmu_idx makes no sense.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Weiwei Li <liweiwei@iscas.ac.cn>
Tested-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Message-Id: <20230325105429.1142530-19-richard.henderson@linaro.org>
Message-Id: <20230412114333.118895-19-richard.henderson@linaro.org>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
target/riscv/cpu_helper.c