drm/i915/display: Fix C20 pll selection for state verification
authorMika Kahola <mika.kahola@intel.com>
Tue, 2 Jan 2024 11:57:39 +0000 (13:57 +0200)
committerJoonas Lahtinen <joonas.lahtinen@linux.intel.com>
Wed, 10 Jan 2024 08:41:55 +0000 (10:41 +0200)
commita4a9779d7642111b4fb6e7415aae9da9783850bd
treec57517f714ffa30e7709942efb156f364432da2b
parentb76c01f1d950425924ee1c1377760de3c024ef78
drm/i915/display: Fix C20 pll selection for state verification

Add pll selection check for C20 as well as
clock state verification0. We have been relying
on sw state to select A or B pll's. This is incorrect
as the hw might see this selection differently. This
patch fixes this shortcoming by reading pll selection
for both sw and hw states and compares if these two
selections match.

Fixes: 59be90248b42 ("drm/i915/mtl: C20 state verification")
v2: reword commit message and include fix to a
    original commit (Imre)
    Compare pll selection (Jani)

Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240102115741.118525-2-mika.kahola@intel.com
(cherry picked from commit f4304beadd88d074333b23fdc7f35d00ee763e14)
Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
drivers/gpu/drm/i915/display/intel_cx0_phy.c