x86/perf/zhaoxin: Add stepping check for ZXC
authorsilviazhao <silviazhao-oc@zhaoxin.com>
Wed, 8 Feb 2023 08:27:22 +0000 (16:27 +0800)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Fri, 10 Mar 2023 08:39:05 +0000 (09:39 +0100)
commita5fa5a41791c4418cc08b80185fdde3e4f9bc4b5
tree43f7faf6f75a6356a5b6f13caf3bc2881e79c1b9
parent2c36c390a74981d03f04f01fe7ee9c3ac3ea11f7
x86/perf/zhaoxin: Add stepping check for ZXC

[ Upstream commit fd636b6a9bc6034f2e5bb869658898a2b472c037 ]

Some of Nano series processors will lead GP when accessing
PMC fixed counter. Meanwhile, their hardware support for PMC
has not announced externally. So exclude Nano CPUs from ZXC
by checking stepping information. This is an unambiguous way
to differentiate between ZXC and Nano CPUs.

Following are Nano and ZXC FMS information:
Nano FMS: Family=6, Model=F, Stepping=[0-A][C-D]
ZXC FMS:  Family=6, Model=F, Stepping=E-F OR
          Family=6, Model=0x19, Stepping=0-3

Fixes: 3a4ac121c2ca ("x86/perf: Add hardware performance events support for Zhaoxin CPU.")
Reported-by: Arjan <8vvbbqzo567a@nospam.xutrox.com>
Reported-by: Kevin Brace <kevinbrace@gmx.com>
Signed-off-by: silviazhao <silviazhao-oc@zhaoxin.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://bugzilla.kernel.org/show_bug.cgi?id=212389
Signed-off-by: Sasha Levin <sashal@kernel.org>
arch/x86/events/zhaoxin/core.c