net: stmmac: dwmac-qcom-ethqos: Add support for 2.5G SGMII
authorSneh Shah <quic_snehshah@quicinc.com>
Tue, 20 Feb 2024 05:07:35 +0000 (10:37 +0530)
committerDavid S. Miller <davem@davemloft.net>
Fri, 23 Feb 2024 10:53:45 +0000 (10:53 +0000)
commita818bd12538c1408c7480de31573cdb3c3c0926f
treeb0bec4c1e990f87b1a3fdc1056ba014089abe71b
parenta4634aa71fee11f5e3e13bf7d80ee1480a64ce70
net: stmmac: dwmac-qcom-ethqos: Add support for 2.5G SGMII

Serdes phy needs to operate at 2500 mode for 2.5G speed and 1000
mode for 1G/100M/10M speed.
Added changes to configure serdes phy and mac based on link speed.
Changing serdes phy speed involves multiple register writes for
serdes block. To avoid redundant write operations only update serdes
phy when new speed is different.
For 2500 speed MAC PCS autoneg needs to disabled. Added changes to
disable MAC PCS autoneg if ANE parameter is not set.

Signed-off-by: Sneh Shah <quic_snehshah@quicinc.com>
Tested-by: Abhishek Chauhan <quic_abchauha@quicinc.com> # sa8775p-ride
Reviewed-by: Abhishek Chauhan <quic_abchauha@quicinc.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c
drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h