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target/arm: Tidy condition in disas_simd_two_reg_misc
authorRichard Henderson <richard.henderson@linaro.org>
Fri, 4 May 2018 17:05:51 +0000 (18:05 +0100)
committerPeter Maydell <peter.maydell@linaro.org>
Fri, 4 May 2018 17:05:51 +0000 (18:05 +0100)
commita8766e3172c1671cab297c1ef4566a3c5d094822
treea054f1207799ceb84881b0152aacf3830133f868tree | snapshot
parent8dae46970532afcf93470b00e83ca9921980efc3commit | diff
target/arm: Tidy condition in disas_simd_two_reg_misc

Path analysis shows that size == 3 && !is_q has been eliminated.

Fixes: Coverity CID1385853
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-id: 20180501180455.11214-3-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
target/arm/translate-a64.c diff | blob | history
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